S4862

OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC

Benefits

The TiPi-Rubicon-48 device is a wide-area and metropolitan transport device aimed at next-generation applications, required transparent mapping, and enhanced error correction capability.

Common register maps, FEC and framing among Rubicon and Rubicon-48 devices for easy migrations paths to lower-power and higher levels of integration.

Utilizes the ITU G.709 frame and overhead structures to enable deployment of full OTN compliant network elements. TiPi-Rubicon-48 will support two gain rates, the standard G.975 based rate of 6.2 dB (raw optical coding gain), and AppliedMicro’s proprietary EFEC code, rated at greater than 8.6 dB (raw optical coding gain).

The device is capable of running both these gains simultaneously, providing a superb single chip transponder solution for standard gain to enhanced gain networks.

Features

• 1 x OC-48/STM-16 synchronous and asynchronous mapping (239,238)
• Bi-directional add-drop ODU1
• Bi-directional G.709 overhead processing for bi-directional OTU1 regeneration
• Dedicated GCC ports
• 1 x OC-48/12/3 TOH add-drop and processing
• 8B/10B monitoring
• SONET/SDH section and line termination including full B2 recalculation
• TOH add-drop port
• LOS, OOF, LOF detection
• B1, B2 monitoring with programmable signal degrade and signal fail thresholds
• JO monitoring, SDH and SONET modes
• Support for protection switching
• K1, K2 monitoring for APS changes, line AIS, and line RDI
• Automatic, interrupt-driven, or manual AIS insertion
• Frame boundary output
• G.709 compliant frame structure
• 2.7 Gbps enhanced FEC with > 8.6 dB coding gain
• G.709 overhead processing and nominal rate expansion
• Comprehensive channel statistics gathering: corrected bits, bytes, corrected zeros, ones (with outputs), uncorrectable sub-frame count
• 16-bit 622 Mbps LVDS interface (MSA compliant) 10 Gbps interface
• 4-bit 622 Mbps LVDS interface
• Provides port swapping and output dual-feed features for 1 + 1 line protection scheme
• Can synthesize SONET frame
• Error injection capability for verification of remote error reporting
• Test-set compliant pseudo-random sequence generation/analysis
• Glueless 16-bit interface to MPC860, 25 MHz to 66 MHz
• Interrupt-driven or polled mode operation
• FEC frame synchronous scrambling
• Programmable sequence detection
• SONET/SDH OC48/STM-16 DWDM transport systems and DWDM metro networks
• Transparent add-drop multiplexing transponder applications
• Protocol transparent transport
• IaDI to IrDI FEC transponder chip (6.2 dB gain network to > 8 dB gain network)
• 1.2 V core operation and 2.5 V I/O
• Package: 676 BPGA, 1.00 mm ball pitch